AUTOMATED TESTING: Electro-optics technology tests flat-panel displays

JEFF HAWTHORNE

Flat-panel liquid-crystal displays (LCDs) have made laptop computers possible. They also have begun to replace cathode-ray-tube monitors for desktop computing. In fact, the monitor market for LCDs is expected to grow rapidly over the next few years. The major hindrance to the growth of this market for LCDs has been high manufacturing cost caused by low yields. Factors such as display size, resolution, and quality requirements have contributed to lower yield. Manufacturers have had to place more emphasis than ever before on quality-control inspection.

Recently, significant improvements in overall yields have been realized by concentrating on in-process test and repair of the thin-film-transistor (TFT) array display component. The future success of LCD manufacturers in penetrating the monitor market will depend on in-process test methodologies that have high defect-capture ratio and strong correlation with defect types found in the complete display and that provide the TACT (total cycle) time required for 100% in-line testing.

TFT-array testing

Testing at the TFT-array step can help to improve yields and reduce overall manufacturing costs (see Fig. 1). Automated optical inspection (AOI) can detect defects at various phases of material-layer patterning. Repair can then be done by stripping and reprocessing the defective photoresist or by using a laser to ablate potential short circuits in the patterned material layer. A functional electrical test is performed on the completed TFT array to detect interlayer shorts not found by optical inspection. A laser-based repair system is used to either ablate or weld various material layers. If repair is not possible, then further processing of the array is suspended to avoid wasting additional materials and labor.

Optical inspection methods

An AOI system generally inspects the TFT-array patterning after photoresist development and after material etch. There are two techniques that can be used for optical inspection. One is an optically based processing method and the other is a digital-image-based processing method. All optical inspection systems in use in production today are based on digital image processing.

Systems based on optical image processing use an optical Fourier-transform approach and a spatial filter to isolate defects in the repetitively patterned TFT array. The advantage to this approach is extremely fast processing. There are several disadvantages that have prevented this approach from being used in practical production equipment. Defect classification—distinguishing between fatal and nonfatal defects—is difficult. Border areas outside the active array cannot be tested because the Fourier transform limits the inspection to repetitive patterns. False defects can arise from the use of coherent laser illumination; very small changes in film thickness and refractive indices of thin films will lead to false defect detection.

Systems based on digital image processing generally use one or more linescan charge-coupled-device (CCD) cameras. The optical system magnification provides resolution in the range of 3-6 µm. Various brightfield and darkfield illumination techniques are used, depending on the material being imaged. The processing algorithm is either a pattern-matching algorithm or a more widely used differencing algorithm. Pattern-matching is computationally intensive and is prone to rotation, magnification, and illumination errors between the pattern being inspected and the reference pattern.

The differencing algorithm compares the difference between one set of TFT-array pixels and the neighboring set of array pixels. The algorithm is extremely fast and flexible. Because the comparison is always performed between neighbors, it is less prone to failure due to rotation, magnification, and illumination variations. Defect classification is possible using gray-scale information about the image and location information of the defect within the TFT pixel structure.

Electrical testing

In most cases, optical inspection alone is not sufficient to determine the performance of a TFT array early in the manufacturing process. Optical inspection cannot find shorts between material layers. In addition, functional characteristics must be measured to assure quality of the completed display. Functional tests include the ability to detect TFT threshold-voltage variations between subpixels, high "on" resistance, leaking TFTs, larger-area voltage variation across the array, pixel and line defects, and pixel capacitance variations. Functional testing methods currently in use include ohmic and continuity testing, charge sensing, and voltage imaging.

Ohmic and continuity testing—the simplest electrical continuity tests—use mechanical probes to contact both ends of each drive and source line. Open lines can be found by simple measurement of the line resistance. If the lines are interdigitated with all even lines connected to one shorting bar and all odd lines to a second shorting bar, adjacent shorts can also be detected. Shorts between gate and data lines can be detected if separate shorting bars are provided for gate and data lines. This technique is simple, fast, and inexpensive, but does not permit TFT characterization or detection of individual pixel defects. This method was popular several years ago; however, fewer manufacturers are using it today.

Charge sensing writes a charge to the storage capacitor at the individual TFT-array pixel. The charge is read back and compared with the write charge to determine if the pixel is defective. A mechanical probing system contacts the individual gate and data lines. Programmed timing patterns are applied to the TFT array through the prober to toggle the individual TFT gates and write a charge to the pixels via the data lines. The basic test simply writes a charge to the individual pixels, holds the charge for a predetermined amount of time, then reads the charge. This constitutes a fast pass-fail test.

Further defect classification or functional characterization can be performed by varying the test parameters, such as gate-pulse height and width and hold time. It is possible to extract the gate threshold voltage, cell-charging time constant, pixel off current, and other pixel parameters.

Charge sensing has several advantages and disadvantages. The advantages include individual testing of each pixel, although many pixels can be tested in parallel. Substantial characterization of TFTs is possible, and they can be tested after they have been passivated or after assembly with the top glass.

The disadvantages include the complexity of the probers, which must be different for each panel design and configuration. Also, resistive elements or diode pairs must couple the shorting bars to provide electrostatic-discharge protection and to maintain adequate isolation between individual lines for testing. New-generation polysilicon TFT displays with integrated drivers cannot be tested by this technique because the control lines are loaded by the connections to the driver circuit.

Voltage-imaging-array testing

The voltage-imaging technique benefits from needing only a shorting bar connection to the TFT array to test. This avoids the expense of full-contact probe cards that most other technologies require. Voltage imaging measures the characteristics of a TFT array by directly measuring the actual voltage distribution on the TFT pixel indium tin oxide (ITO) and not at the storage capacitor. This measuring technique simulates the actual performance of the array as if it were an assembled TFT cell.

An electro-optic modulator is positioned within 10 to 20 µm of the TFT-array plate under test. A voltage-pattern generator is connected between the TFT-array plate and the ITO surface on the electro-optic modulator; a voltage potential is then created between the ITO surface and at each display pixel on the TFT array. Light passing through the modulator has its intensity modulated as a function of the voltage potential across the modulator. The modulated light is imaged using diffraction-limited optics onto a 2K x 2K CCD camera.

At each measurement site, a gain-correction image and a measurement image is acquired. The gain-correction image is applied to the measurement image to scale modulated light intensity to voltage levels and to correct for modulator and illumination nonuniformity. The image undergoes a geometrical warping operation to map voltages at CCD-pixel resolution into voltages at TFT-array pixel resolution. User-defined voltage threshold levels are applied to the warped image to locate defective pixels. Postprocessing of the defective pixels can determine whether an open or shorted circuit caused the defect. The system can find not only pixel-level defects but also large areas of voltage variation that can cause brightness nonuniformity in the completed display.

The entire TFT-array is measured by stepping the plate under the 70 x 70-mm modulator and acquiring images. The acquired image is processed as the plate is stepped to the next measurement site. The site-to-site time is typically 1.8 s. A typical TFT-array plate, which contains six 13.3-in.-diagonal displays, can be tested in less than 200 s.

Future directions

Improvements to optical inspection will include increased optical resolution to detect smaller features. This will aid in the detection of material spikes that can cause interlayer shorts; these spikes are generally less than 1 µm in width. The challenge with higher resolution will be to maintain current TACT times. Another desirable improvement is an increased ability to detect defects in low-contrast material, such as ITO on glass, and additionally the ability to detect defects in low-contrast materials that are adjacent to high-contrast materials. Improving TACT times and detection classification will allow a move from the performing of sample tests to 100% in-line testing.

Electrical testing will be improved to allow better detection of weak or soft pixel defects. Although the pixel is functional for such defects, it cannot attain the full voltage level or hold the correct voltage level. This affects the number of gray-scale levels the pixel can achieve, which in turn affects the signal-to-noise performance that the test system can achieve.

Another required improvement involves defect characterization and classification. Here, individual defect classification must be extended to "repairable" or "unrepairable." The TACT time for repair systems is a function of the number of defects an operator must review to determine if they are repairable or not. Also desirable is the ability to perform functional testing of the TFT-array plate with drivers integrated onto the array plate.

The ability of an LCD manufacturer to successfully penetrate the CRT monitor market will depend on achieving higher-quality levels and lower-cost targets than are required for the laptop market. The majority of manufacturers have adopted in-process TFT-array testing to meet the quality and cost targets. Defect-capture ratio, correlation with completed display quality, and reduced TACT time for test equipment are becoming more important as manufacturers place greater emphasis on 100% in-process testing. The voltage imaging test method is well suited to satisfying these requirements, because the test method simulates the actual operation of the complete display.

Jeff Hawthorne is vice president of development at Photon Dynamics Inc., 6325 San Ignacio Ave., San Jose, CA 95119; e-mail: [email protected].