A shift to photonics for data center networks and AI is underway

Ayar Labs is pioneering a solution to the biggest bottleneck within artificial intelligence (AI) system architectures: High-bandwidth movement of data primarily between compute chips, such as graphical processing units (GPUs) or central processing units (CPUs).

Today, this traffic is routed electrically on copper. But the electrical architecture is rapidly approaching the end of its roadmap, and optical signaling offers a more sophisticated way forward. Chip-to-chip communications of the future will require photonics.

“Our TeraPHY family of in-package optical chiplets can be packaged with a compute chip to convert data traffic on light into data traffic with electrons, which enables the electrons to ‘talk to the system on chip.’ Then, the light leaves the package and travels to another TeraPHY on another chip,” says Thorn. “It allows TeraPHY to talk to the system on chip (SOC) in the language it understands, which is electrons, while talking between packages with photons.”

This delivers much-improved latency, bandwidth, and power efficiency than possible via state-of-the-art technology today (see video).

“We power the optical side of the chiplet—it needs a power source—with our SuperNova remote multiwavelength light source,” Thorn adds. “For each transfer component within the chiplet or ‘macro,’ there must be a light source for the transfer of data, so each of these macros has a light source coming in from our SuperNova.”

The SuperNova is set up as a distributed feedback (DFB) laser array. Its first generation had “eight ports that paired 1:1 with eight ports on the chiplet,” Thorn explains. “Each of the eight ports/fibers leaving the SuperNova carried eight wavelengths. Each of these wavelengths acted as a transport slice for data. Eight ports by eight wavelengths meant 64 data paths.”

For the next generation of SuperNova currently being designed and expected to be out in samples in 2025, Ayar Labs is keeping its eight-port configuration but doubling the wavelength count to a 16-wavelength light source. This doubles the data paths and provides a larger data path. “It’s the laser array we use with our SuperNova,” Thorn says.

On the photonic integrated chiplet side, the core technology of the second-gen TeraPHY (coming out in 2025) will remain the same. But one significant change is the move to an electrical interface—a Universal Chiplet Interconnect Express (UCIe) standard package.

“It’s important to us from an adoption standpoint that we fit into the standards of the industry,” says Thorn. “The UCIe specification will help us tremendously with market adoption of the chiplet we’re about to come out with in 2025.”

The UCIe specification is used by compute chip manufacturers, so it gives Ayar Labs a landing zone electrically, if you will. “Because our chiplet and their compute chip are built to the same specification and can engage (talk to each other), it gives us a broader application within the marketplace—potentially for the same SKU (stock-keeping unit) of chiplet going into many different types of compute and data traffic architectures,” Thorn explains.

On the photonics side of that chip, an increase in laser capability also increases the capability of the chiplet. “Our current chiplet is 4 Terabits/s, but the one we have coming out in 2025 using the UCIe construct is 8 Terabits/s,” says Thorn.

Ayar Labs’ chiplets are fabricated by GlobalFoundries on their Fotonix process (300-mm silicon wafers; see Fig. 1), while SuperNova comes from multiple suppliers.

Integrated photonics on silicon

When you start integrating photonics into a multichip package (see Fig. 2), there are a few challenges to navigate around.

“We’re putting photonics into an electrical package,” says Thorn. “And a few things in the manufacturing process are different: One is you need to test the electrical circuits in a package to ensure it’s ‘good’ and performs as expected, but you now also need to test the photonics of that package, which is a new behavior being put into place in packaging test lines. We, and our partners, spend a lot of time and effort ensuring we’ve got high-volume manufacturability on package and test.”

When you start dealing with fibers for photonics coming out of the package—not just the attach of the fibers, but also the routing of fiber bundles within the system—it needs to be done in a high-volume way.

Another challenge is heat. One of the reasons Ayar Labs created their SuperNova light source is because “lasers behave differently than silicon in temperature dynamics,” says Thorn. “Our chiplet is built in a CMOS process, so it’ll go through the same range of temperatures and behave the same as the silicon used for CPUs and GPUs. But lasers start to behave differently when they start getting rather hot or operate at the temperatures silicon reaches. Their lifetime is affected, and the way wavelengths are being produced, tracked, and moved is also affected.”

So their light source is built separately (remote) and designed so it can be placed within a different part of the server rack or even away from the server rack—to provide an environment more beneficial for the lasers’ lifetime—while the chiplet is put right next to the silicon.

Timeline

Ayar Labs is already shipping thousands of engineering samples of their chiplets so people can establish and qualify their manufacturing, packaging, and testing processes.

“Based on what our customers need to solve problems within data centers and their progress on the ecosystem to support it, between 2026 and 2028, you’ll see commercial offerings with optical I/O,” says Thorn. “From this point on, you’ll see it adopted by those who need it first and for the biggest benefit: AI infrastructure. Anywhere that can benefit from moving data faster with a bigger pipe for lower energy, you’ll see implement optical I/O in the future.”

Beyond AI infrastructure, the company is working with partners like Lockheed Martin to explore how radar systems on airplanes can benefit from optical chiplets. “Radar systems have compute chips that are connected to copper, so you’ve got copper going to and from the radar systems,” explains Thorn. “If you replace the copper with fiber and replace the electrical interconnects with optical interconnects, you not only get a faster data rate that allows you to think differently about how you use your radar systems, but you also get a lighter approach to the weight you’re putting on the plane. Any time you can reduce weight on an airplane or a ship, you benefit by shifting it to other payloads you may want to carry.”

Another cool application area Ayar Labs is working on is for cell towers with Ericsson—to explore how an optical chiplet solution in the top of a cell tower can achieve more of a compute structure there rather than needing to bring the compute down to a more central compute center.

After the 2026 to 2028 adoption window for the AI infrastructure and data center realm, many other markets are likely to follow.

“It’s really cool to get to work on a solution like this,” says Thorn. “Within the industry, there are very few times you get to be part of something that’s really revolutionizing the way things work inside data centers and compute engines. This is one of those moments and it’s exciting to be a part of it.”