Avanex joins consortium to develop photonic firewall on a chip

Nov. 17, 2006
November 17, 2006, Fremont, CA--Avanex Corporation has joined an international consortium that is aiming to develop a reconfigurable photonic-firewall subsystem on a chip. Other members of the consortium include the Tyndall Institute (Cork, Ireland), the Foundation for Research and Technology (FORTH; Hellas, Greece), the Centre for Integrated Photonics (CIP; Ipswich, England), and British telecommunications giant BT (London, England).

November 17, 2006, Fremont, CA--Avanex Corporation has joined an international consortium that is aiming to develop a reconfigurable photonic-firewall subsystem on a chip. Other members of the consortium include the Tyndall Institute (Cork, Ireland), the Foundation for Research and Technology (FORTH; Hellas, Greece), the Centre for Integrated Photonics (CIP; Ipswich, England), and British telecommunications giant BT (London, England).

The three-year project, called WISDOM (wirespeed security domains using optical monitoring), brings together expertise that covers fundamental research (Tyndall National Institute and The Foundation for Research and Technology), component and subsystem fabrication (CIP, project coordinator), OEM system design and manufacturer (Avanex), and telecommunications network operator (BT).

Avanex makes photonic components that include amplifiers and devices for dispersion compensation, switching and routing, and multiplexing.

Too fast for electronics
As optical-transmission data rates increase, firewalls (which currently are based on electronics, not optics) become harder to implement. In addition, a large percentage of optical traffic is only converted to electronic signals at the final nodes, preventing the deployment of standard security-authentication protocols. And existing optical techniques that provide some level of packet screening for optical bypass are cumbersome and reduce the traffic load on a particular router.

WISDOM aims to develop a proof-of-concept demonstration for a reconfigurable photonic-firewall subsystem on a chip to allow optical-data inspection using security algorithms optimized for high-speed operation in the optical domain. The approach is designed to complement current electronic-security techniques by providing optical-information filtering operating throughout the optical-telecommunication infrastructure.

The optical processing submodules will perform bit-pattern recognition as input to a range of security algorithms, based on existing research in network intrusion-detection systems. In broad terms, these algorithms use combinations of rule bases and statistical models to identify potentially interesting network events.

The optical processing will be based on all-optical logic gates using semiconductor optical amplifiers (SOAs) as nonlinear elements. The necessary firmware and protocols to operate the network devices will also be developed as part of the project, and the network devices developed will be evaluated on state-of-the-art network operator testbeds.

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