Practical CMOS-compatible silicon photonics will radically boost the capabilities of computer chips–at least if a practical way is developed to fabricate the optics and electronics together. One problem is that the layer of silica (SiO2) between a silicon (Si) waveguide and the Si wafer needs to be many times the thickness of the SiO2 between a transistor and the wafer; this incompatibility makes integration of optics on the transistor layer very difficult. But researchers at Cornell University (Ithaca, NY) have come up with a way of locally creating a thick layer of SiO2 only in the region below waveguides, using a real CMOS-compatible wafer and process.
A layer of silicon nitride (Si3N4) is deposited and etched through to the Si to create the waveguide geometry; Si3N4 is deposited and etched again to create a tall waveguide covered on three sides by Si3N4. Next, using wet oxidation, a layer of SiO2 is grown everywhere except on the Si3N4; the result is an SiO2 layer that grows until it meets under the waveguide, creating the desired nice, thick (3 µm) buffer layer while allowing transistors elsewhere to have their thin (40 nm) buffer layers. (A final upper SiO2 is grown over the waveguide to complete the optical buffer.) The first experimental waveguide showed a loss of 2.92 dB/cm–which, when optimized, could be reduced to 0.001 dB/cm. Contact Nicolás Sherwood-Droz at[email protected].
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